TransEDA Hosts Worldwide Seminar on System-Level Verification
LOS GATOS, Calif.--(BUSINESS WIRE)--April 4, 2001--
TransEDA PLC, the leader in functional verification for electronic
system-on-chip (SoC) and intellectual property (IP) designs, will host
educational seminars in April and May for design engineers and
verification engineers.
The seminars are aimed at improving functional integrated circuit
(IC) verification techniques at the system, chip and module levels.
The free, half-day seminars will be held April 19 in San Jose,
Calif.; April 24 in Austin, Texas; April 26 in Boston; May 3 in
Munich, Germany; May 9 in London; May 10 in Paris; May 15 in Seoul,
Korea; May 16 in Tokyo; and May 18 in Hsinchu, Taiwan.
Each session will present verification techniques that will show
attendees how they can shrink system verification and debug time,
reduce simulation time for future projects and eliminate the
uncertainty in creating system-level verification components. Senior
R&D managers from TransEDA will present at each of the technical
sessions.
``Verification is a crucial part of designing chips because a
mistake in silicon is costly. Having to make a second run of silicon
can cost not only additional development time and money, but it can
cause a company to miss a market window entirely,'' said Ellis Smith,
chief executive officer at TransEDA. ``This educational seminar will
show engineers new ways they can cut the system verification time
while reducing schedule and development risk.''
To register for ``Bridging the Verification Gap,'' complete the form
at www.transeda.com/seminar or send an e-mail to seminar@transeda.com
with contact details and indicate which seminar you would like to
attend.
About TransEDA
TransEDA PLC (symbol TRA on the London Stock Exchange) develops
and markets software and IP for verifying electronic integrated
circuit (IC) and system on a chip (SoC) designs. The company's
verification IP library includes models for advanced microprocessors
and bus interfaces. The company's design verification solutions
perform system level testbench automation, configurable HDL checking,
coverage analysis, test suite analysis, and state machine analysis.
TransEDA's customers include 18 of the top 20 semiconductor vendors,
which represent 74 percent of the worldwide semiconductor industry.
For more information, contact TransEDA at 985 University Avenue, Los
Gatos, California 95032, telephone 408/335-1300, fax 408/335-1319,
e-mail info@transeda.com, or visit http://www.transeda.com.
Contact:
TransEDA
Tom Borgstrom, 408/335-1303
tom.borgstrom@transeda.com
or
Cayenne Communication
Michelle Clancy, 252/940-0981
michelle.clancy@cayennecom.com
or
PentaCom
Sharon Graves, +44 1242 525205
sharon.graves@btinternet.com
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